Overview Of My Research：我的科研工作一览

My Works

点击可以访问我的 IEEE 主页

我主导的工作 (1)

1. Y. He and X. Lou*, “Density Estimation-based Effective Sampling Strategy for Neural Rendering,” in Proc., IEEE Int. Symp. Circuits Syst. (ISCAS), 2024.

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我参与的工作 (6)

1. K. Long, C. Rao, Y. He, Z. Yuan, P. Zhou, J. Yu and X. Lou, “Analysis and Design of Precision-scalable Computation Array for Efficient Neural Radiance Field Rendering”, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 11, pp. 4260-4270, Nov. 2023, doi: 10.1109/TCSI.2023.3293534.
2. X. Wang, Y. He, X. Zhang, P. Zhou and X. Lou, “An Efficient Hardware Volume Renderer for Convolutional Neural Radiance Fields,” in Proc., IEEE Int. Symp. Circuits Syst. (ISCAS), 2024.
3. Z. Yuan, B. Yuan, Y. Gu, Y. Zheng, Y. He, X. Wang, C. Rao, P. Zhou, J. Yu and X. Lou, “A 0.59μJ/pixel High-throughput Energy-efficient Neural Volume Rendering Accelerator on FPGA” in Proc. IEEE Custom Integrated Circuits Conference (CICC), 2024.
4. J. Ding, Y. He, B. Yuan, Z. Yuan, P. Zhou, J. Yu and X. Lou, “Ray Reordering for Hardware-Accelerated Neural Volume Rendering” in IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), 2024.
5. Z. Yuan B. Yuan, C. Rao and Y. Zhu Y. He, P. Zhou, J. Yu, X. Lou, “A Neural Rendering Coprocessor With Optimized Ray Representation and Marching,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, doi: 10.1109/TVLSI.2025.3572959.
6. B. Yuan, X. Zhang, Z. Zheng, Y. Zhang, H. Wan, Z. Yuan, J. Chen, Y. He, J. Ding, X. Zhang, C. Rao, W. Su, P. Zhou, J. Yu and X. Lou, “An Energy-Efficient Edge Coprocessor for Neural Rendering With Explicit Data Reuse Strategies,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025, Early Access Article. doi: 10.1109/TVLSI.2025.3641653.

Others: 文学类

• 陈娅妮， 贺云翔， “论中国古代诗词中的‘加餐’，” 《古典文学知识》， 2025年第12期（总第318期）， 第17-21页。